Thermal management of multi-chip electronic packages is critical to ideal performance of the multi-chip electronic packages. Currently, multi-chip electronic packages encapsulate chips between a lid and chip carrier by forming a customized gap between pistons of the lid and the chips mounted on the chip carrier, and dispensing a thermal interface material (TIM) within the gap. The gap is formed by the use of a chip shim placed between pistons of the lid and the chips of the multi-chip electronic packages.
Referring to FIGS. 1a and 1b, a plurality of chips 12 are shown attached to a chip carrier 10. During assembly, a chip shim 15 is placed between pistons 16 and chip 12 in order to form a gap between the pistons 16 and the chips 12 (FIG. 1a). A lid or hat 14 (hereinafter referred to as a lid) is positioned over the chip carrier 10. The lid has “pistons” 16 that are moved such that they contact the chip shim 15. The lid 14 is then removed from the chip carrier 10, and the pistons 16 are fixedly attached to the lid 14. The chip shim 15 is removed and thermal interface material is then placed on the chips. Once the thermal interface material is on the chips 12, the chip carrier 10 and lid 14 are sealed to one another in order to encapsulate the chips 12 (FIG. 1b). As shown in FIG. 1b, the surface of the lid 14 will typically contact a surface of the chip carrier 10, in the assembled state.
The assembly process described with reference to FIGS. 1a and 1b, however, results in a large thermal interface gap between the surface of the chip 12 and the respective piston 16, e.g., on the order of about 80 microns or more. This resultant thermal interface gap is largely due to the structural constraints of the lid 14, e.g., the edges of the lid 14 contacting the surface of the chip carrier 10, when in the assembled state. More specifically, the structural constraint of the assembly physically blocks the lid from moving closer to the chip carrier 10, hence preventing the pistons from closing such thermal interface gap. And, due to this larger gap, additional large thermal interface gap, e.g., 80 microns or more, is between the pistons 16 and the chips 12 which, in turn, actually reduces the thermal performance of the Multi-chip module (MCM). That is, the added thermal paste to fill the gap between the chip 12 and the respective piston 16 with higher thermal resistance increases chip temperature in MCM.
Also, the direct load through particles between the lid 14 and the chip carrier 10 results in a load distributed more uniformly across the chip carrier 10. This reduces load and decreases on the stress on the chip carrier 10. The warpage of the lid 14 further degrades thermal performance for additional TIM between the hat and heatsink.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.